1. Field of the Invention
The present invention relates to a current source circuit, and more particularly, to a current source circuit having a compensation threshold voltage.
2. Description of Related Art
Low-temperature poly-silicon (LTPS) technology is a new fabrication processing technology for thin film transistor liquid crystal displays (TFT-LCD). In comparison with conventional amorphous silicon (a-Si) LCD, a LTPS LCD has the advantages of fast response speed, high brightness and high resolution.
Hence, the use of LTPS transistor for application in integrated circuits such as active matrix liquid crystal display (AMLCD) and active matrix organic light emitting diode (AMOLED) has been given a tremendous amount of attention. In a poly-silicon (poly-Si) TFT-LCD, the poly-Si TFT, for example, is utilized in a pixel circuit and a driving circuit on a glass substrate to lower the processing costs. In fact, many LTPS AMLCDs having driving circuits and control circuits mounted on the glass substrate can be implemented in portable systems such as mobile phones, digital cameras and notebook computers. In the future, the development of LTPS fabrication process steers towards realizing the implementation of LCD integration designs such as system-on-panel(SoP) or system-on-glass(SoG), especially display systems that are compact, low in manufacturing costs and low in power consumption.
However, in LTPS fabrication process, the utilization of analog circuit design is inevitable. Hence, the need for bias voltage is arisen. During the LTPS fabrication process, if the bias voltage is not precise enough, the circuit cannot be implemented on the glass substrate. In other words, the bias voltage needs to be precise enough to be utilized on the glass substrate. Defects such as non-uniform performance may result in LTPS fabrication process, which the threshold voltage may be varied and the bias voltage become made imprecise, thus the operation of the circuit is affected.
FIG. 1 is schematic view illustrating a circuit diagram of a circuit diagram of the conventional current source circuit (during an 8 μm LTPS fabrication process). Referring to FIG. 1, a current source circuit 100 is an NMOS transistor. FIG. 2 is a schematic view illustrating a HSPICE simulation showing the relationship between the gate voltage VG and the drain current ID. In this graph, the operational voltage VDD is set to be 10V, the size of the NMOS transistor is set to be 80 μm/8 μm, the gate bias voltage is set to be between 1.3V˜4.3V, and the drain bias voltage is set to be also between 1.3V˜4.3V (for the NMOS transistor to operate in saturation). Further, the NMOS transistor has a threshold voltage variation of 50% Gaussian distribution. According to FIG. 2, when the gate voltage VG is 3.8V, the difference in the drain current ID is 22 μA, and the variation of the drain current ID is 88% (the value is obtained by dividing the difference in the current into the average value of the current). This by dividing the difference in the current into the average value of the current). This variation will result in mismatch between the gate voltage VG and the drain current ID, affecting the normal operation of the entire circuit. Therefore, variation in the threshold voltage affects the operation of the entire circuit.